The present invention relates to a semiconductor device and a manufacturing method thereof, and particularly relates to a technique effective when applied to a semiconductor device including a MISFET and a resistance element and to a manufacturing method thereof.
A MISFET (Metal Insulator Semiconductor Field Effect Transistor) can be formed by forming a gate insulating film over a semiconductor substrate, forming a gate electrode over the gate insulating film, and forming a source-drain region by ion implantation or the like. As the gate electrode, a poly-silicon film is used typically.
Recently, however, the gate insulating film has been made thinner along with miniaturization of the MISFET element, and it becomes difficult to neglect a depletion effect of the gate electrode when the poly-silicon film is used as the gate electrode. Accordingly, there has been developed a technique of suppressing the depletion phenomenon in the gate electrode by using a metal gate electrode as the gate electrode.
Further, although the gate insulating film has been made thinner along with the miniaturization of the MISFET element, when a thinner silicon oxide film is used as the gate insulating film, so called tunnel current, that is, electrons flowing in a channel of the MISFET tunnel through a barrier wall formed by a silicon oxide film to flow to the gate electrode, is generated. Accordingly, there has been developed a technique of reducing the leak current by using a material having a dielectric constant higher than the silicon oxide film (high dielectric constant material) as the gate insulating film and increasing a physical film thickness while keeping the same capacitance.
Japanese Patent Laid-Open No. 2001-168299 (Patent document 1) describes a technique providing a semiconductor device structure for enabling a cell capacitor to be fabricated having a MIM or MIS structure which employs a low resistivity conductive material such as Ru for an upper electrode and a resistance element utilizing a high resistance conductive material such as poly-silicon, substantially without process extension.